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1. general description the pca9509p is a level translating i 2 c-bus/smbus repeater with two voltage supplies that enables processor low voltage 2-wire serial bus to interface with standard i 2 c-bus or smbus i/o. while retaining all the operating modes and features of the i 2 c-bus system during the level shifts, it also permits extension of the i 2 c-bus by providing bidirectional buffering for both the data (sda) and the clock (scl) lines, thus enabling the i 2 c-bus or smbus maximum capacitance of 400 pf on the higher voltage side. port a allows a voltage range from 0.8 v to 1.5 v and is overvoltage tolerant. port b allows a voltage range from 2.3 v to 5.5 v and is overvoltage tolerant. both port a and port b sda and scl pins are high-impedance when the pca9509p is unpowered. the bus port b drivers are compliant with smbus i/o levels, while port a uses an offset low which prevents bus lock-up and allows the bidirectional nature of the device. the output pull-down on the port a internal bu ffer low is set for approximately 0.2v cc(a) , while the input threshold of the internal buffer is set about 0.1v cc(a) lower than that of the output voltage low. when the port a i/o is driven low interna lly, the low is not recognized as a low by the input. this prevents a lock-up condition from occurring. the output pull-down on the port b drives a hard low and the input level is set at 0.3 of smbus or i 2 c-bus voltage level which enables port b to connect to any other i 2 c-bus devices or buffer. the pca9509p drivers are not enabled unless v cc(a) is above 0.7 v and v cc(b) is above 1.7 v. the enable (en) pin can also be used to turn the drivers on and off under system control. caution should be observed to only change the state of the en pin when the bus is idle. the pca9509p is the same as the pca9509a but without the port a internal current source to allow high value pull-up resistors to reduce current consumption in portable applications. pca9509p low power level translating i 2 c-bus/smbus repeater rev. 1 ? 14 august 2012 product data sheet
pca9509p all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 1 ? 14 august 2012 2 of 23 nxp semiconductors pca9509p low power level translating i 2 c-bus/smbus repeater 1.1 selection recommendations the pca9509p should be used if an external a-port pull-up resistor is required to adjust current for noise margin considerations or to reduce operating current consumption. see ta b l e 1 for comparison. [1] the pca9509 current mirrors do not shut down when the device is disabled allowing instant turn-on, but at the cost of the higher standby current. the pca9509a and pca9509p current mirrors are turned off when disabled for lowest standby power cons umption, but sufficient delay (10 ? s) after enable is needed before resuming operation. [2] operating currents do not include the current consumed by the external pull-ups on b-port or the external pull-ups on the a-port of the pca9509p. 2. features and benefits ? bidirectional buffer isolates capacitance and allows 400 pf on port b of the device ? voltage level translation from port a (0.8 v to 1.5 v) to port b (2.3 v to 5.5 v) ? no internal current source on a port to reduce current consumption for portable applications ? active high enable input disables current mirrors to reduce standby power ? open-drain inputs/outputs ? lock-up free operation ? supports arbitration and clock stretching across the repeater ? accommodates standard-mode and fast-mode i 2 c-bus devices and multiple masters ? powered-off high-impedance i 2 c-bus pins ? operating supply voltage range of 0.8 v to 1.5 v on port a, 2.3 v to 5.5 v on port b ? all pins are 5 v tolerant with respect to ground pin ? 0 hz to 400 khz clock frequency remark: the maximum system operating frequency may be less than 400 khz because of the delays added by the repeater. ? esd protection exceeds 2000 v hbm per jesd22-a114 and 1000 v cdm per jesd22-c101 ? latch-up testing is done to jedec standard jesd78 which exceeds 100 ma ? packages offered: tssop8, xqfn8 table 1. device selection recommendation concern recommended device pca9509 pca9509a pca9509p a-port ? lowest voltage 0.1 v 0.85 v 0.85 v a-port ? current source [1] yes ? 1 ma yes ? 270 ? a no ? external pull-up operating current [2] <6.1ma <1.9ma <0.95ma standby current en = low < 2 ma < 22 ? a max. < 22 ? a max.
pca9509p all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 1 ? 14 august 2012 3 of 23 nxp semiconductors pca9509p low power level translating i 2 c-bus/smbus repeater 3. ordering information [1] ?x? will change based on date code. 4. functional diagram table 2. ordering information type number topside mark package name description version PCA9509PDP 9509p tssop8 plastic thin shrink small outline package; 8 leads; body width 3 mm sot505-1 pca950pgm 9px [1] xqfn8 plastic, extremely thin quad flat package; no leads; 8 terminals; body 1.6 ? 1.6 ? 0.5 mm sot902-2 fig 1. functional diagram of pca9509p 002aag171 pca9509p a1 a2 en b1 b2 v cc(a) v cc(b) gnd
pca9509p all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 1 ? 14 august 2012 4 of 23 nxp semiconductors pca9509p low power level translating i 2 c-bus/smbus repeater 5. pinning information 5.1 pinning 5.2 pin description [1] port a and port b can be used for either scl or sda. fig 2. pin configuration for tssop8 fig 3. pin configuration for xqfn8 PCA9509PDP v cc(a) v cc(b) a1 b1 a2 b2 gnd en 002aag172 1 2 3 4 6 5 8 7 002aag174 pca9509pgm transparent top view terminal 1 index area 2 3 1 a1 a2 v cc(a) 6 5 7 b2 en b1 4 gnd 8 v cc(b) table 3. pin description symbol pin description v cc(a) 1 port a power supply a1 [1] 2 port a (lower voltage side) a2 [1] 3 port a (lower voltage side) gnd 4 ground (0 v) en 5 enable input (active high) b2 [1] 6 port b (smbus/i 2 c-bus side) b1 [1] 7 port b (smbus/i 2 c-bus side) v cc(b) 8 port b power supply
pca9509p all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 1 ? 14 august 2012 5 of 23 nxp semiconductors pca9509p low power level translating i 2 c-bus/smbus repeater 6. functional description refer to figure 1 ? functional diagram of pca9509p ? . the pca9509p enables i 2 c-bus or smbus translation down to v cc(a) as low as 0.8 v without degradation of system performance. the pca9509p contains 2 bidirectional open-drain buffers specifically designed to support up-translation/down-translation between the low voltage and 3.3 v smbus or 5 v i 2 c-bus. the port a and port b i/os are over-voltage tolerant to 5.5 v even when the device is unpowered. the pca9509p includes a power-up circuit that keeps the output drivers turned off until v cc(b) is above 1.7 v and the v cc(a) is above 0.7 v. v cc(b) and v cc(a) can be applied in any sequence at power-up. after power-up and with the en pin high, a low level on port a (below approximately 0.15v cc(a) ) turns the corresponding port b driver (either sda or scl) on and drives port b down to about 0 v. when port a rises above approximately 0.15v cc(a) , the port b pull-down driver is turned of f and the external pull-up resistor pulls the pin high. when port b falls first and goes below 0.3v cc(b) , the port a driver is turned on and port a pulls down to 0.2v cc(a) (typical). the port b pull-down is not enabled unless the port a voltage goes below v il . if the port a low voltage goes below v il , the port b pull-down driver is enabled until po rt a rises above approximately 0.15v cc(a) (v il ), then port b, if not externally driv en low, will rise being pulled up by the external pull-up resistor. when port b voltage rises above 50 % of v cc(b) , port a will continue to rise being pulled up by external pull-up resistor. remark: ground offset between the pca9509p ground and the ground of devices on port a of the pca9509p must be avoided. the reason for this cautionary remark is that a cmos/nmos open-drain capable of sinking 3 ma of current at 0.4 v will have an output resistance of 133 ? or less (r = e / i). such a driver will share enough current with the port a output pull-down of the pca9509p to be seen as a low as long as the ground of fset is zero. if the ground offset is greater than 0 v, then the driver resistance must be less. since v il can be as low as 80 mv at cold temperatures and the low end of the curr ent distribution, the maximum ground offset should not exceed 40 mv. bus repeaters that use an output offset are not interoperable with the port a of the pca9509p as their output low levels will not be recognized by the pca9509p as a low. if the pca9509p is placed in an application where the v il of port a of the pca9509p does not go below its v il the port b will not go low. port b provides normal i 2 c-bus voltage levels and is interoperable with all i 2 c-bus slaves, masters and repeaters. 6.1 enable the en pin is active high and allows the user to select when the repe ater is active. this can be used to isolate a badly behaved slave on power-up until after the system power-up reset. it should never change state during an i 2 c-bus operation because disabling during a bus operation will hang the bus and enab ling part way through a bus cycle could confuse the i 2 c-bus parts being enabled. the en also puts the pca9509p in a standby condition to reduce power consumption.
pca9509p all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 1 ? 14 august 2012 6 of 23 nxp semiconductors pca9509p low power level translating i 2 c-bus/smbus repeater the enable pin should only change state when the bus and the repeater port are in an idle state to prevent system failures. because the enable pin (en) can put the pca9509p in standby mode, and when in standby the current mirrors are turned off to save power, the recovery from the disabled/standby state is slow so that the curr ent mirrors can return to full curr ent before the channels are enabled. remark: the system design should allow sufficient time after stop be fore disabling the pca9509p so that both sides of the sda and scl channels are high. it should also allow sufficient time before the start such that the cha nnel will be disabled before the sda goes low. the pca9509p should only be enabled during a bus idle state and there also needs to be sufficient time allowed be fore the start such that the pca9509p will be fully active before the falling edge of the sda that defines a start. 6.2 i 2 c-bus systems as with the standard i 2 c-bus system, pull-up re sistors are required to provide the logic high levels. the size of these pull-up re sistors depends on the system. port a is designed to work with pull-up resistor?s size as required to meet rise time requirements but minimize current consumption. port b is designed to work with standard-mode and fast-mode i 2 c-bus devices in addition to smbus devices. standard-mode i 2 c-bus devices only specify 3 ma output drive; this limits the termination current to 3 ma in a generic i 2 c-bus system where standard-mode devices and multiple masters are possible. under certain conditions higher termination currents can be used (when all currents are >3ma). 6.3 edge rate control the pca9509p includes circuitry that slows down the fallin g edge of both the a side and b side open-drain output pull-downs. this slowdown reduces system noise and undershoot when the signal reflects off of the end of the bus. the slew rate control circuit limits the maximum slew rate, and is relatively insensitive to the load capacitance, the bus high voltage and to the pull-up value. the rising edge slew rate on the a side and b side is controlled by rc time constant of the bus pull-up resistor and the bus capacitance, which are system level considerations and not under the control of the pca9509p. the pull-up resistors should be chosen based on the total bus capacitance to result in a reasonable rising edge transition time that is less th an the maximum allowed rise time, and slow enough not to make system level noise proble ms, and to make the a side low voltage less than v il . 6.4 bus pull-up resistor selection the ac test load for the pca9509p is 1.35 k ? and 50 pf total capacitance. this results in a rise time of approximately 60 ns. the 1.35 k ? resistor is chosen to provide a little less than 3 ma in a 3.3 v application so it is compatible with standard-mode i 2 c-bus devices as well as fast-mode devices. the b side out put pull-down is a strong driver and is capable of sinking fast-mode plus (fm+) current s, however the pull-up must be sized for the weakest part in the sys tem, so if standard-mode i 2 c-bus parts are present on the b side, the pull-up must be limited to less than 3 ma. if only fm+ parts are used on the b side the maximum pull-up current may be up to 30 ma. the pull-up resistor should always be sized to provide less than the ra ted pull-up current for the weakest part on the bus under the maximum bus voltage expected in the system. when the bus capacitance
pca9509p all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 1 ? 14 august 2012 7 of 23 nxp semiconductors pca9509p low power level translating i 2 c-bus/smbus repeater is high the current should be set near the maximum current drive for the weakest part. however, if the bus capacitance is low a lowe r current/higher resistor value should be used to keep the rise time from getting so fast that it causes problems. the a side pull-up resistor must be selected so as to keep the low-level voltage at the a side input below 0.1v cc(a) . 6.4.1 port a pull-up resistor sizing when selecting the pull-up resistor for the a side of the pca9509p there are several considerations and limitations from both the pca9509p and the other part(s) on the a-side bus that need to be taken into account. 6.4.1.1 minimum resistor size the first limitation is that in order for the pc a9509p to recognize a low on the a side, the voltage level must be below 0.1v cc(a) including ground offset. this and the drive strength of the parts driving the less than 0.1v cc(a) level define the minimum resistor value that can be used based on the other parts on the a-side bus. there is also a limit of 4 ma maximum current that can be applied to the pca9509p a side when it is low. for example, if the part driving the pca9509p a side is rated at 3 ma at 0.4 v (and it is a mos part) and assuming that v cc(a) = 0.8 v, then the part has an effective output resistance of 0.4 v / 3 ma = 133 ? , so the maximum current is 0.08 v / 133 ? =~600 ? a, so the maximum pull-up current would be 600 ? a. and for v cc(a) = 0.8 v the minimum resistance would be 0.72 v / 600 ? a=1.2k ? . if the part providing the 0.1v cc(a) has a very low output resistance, then the current is limited to 4 ma by the pca9509p, and for v cc(a) = 0.8 v the minimum pull-up resistance would be 0.64 v / 4 ma = 160 ? . since the ground offset will never be ze ro, the minimum resistor va lue will need to be increased accordingly. 6.4.1.2 maximum resistance sizing the pull-up resistor on the a side of the pca9509p should be chosen to provide at least 100 ? a of pull-up current. so for v cc(a) = 0.8 v the maximum resi stor value looks like 0.64 v / 100 ? a=6.4k ? . 6.4.1.3 rise time constraints in addition to the current minimum and maximu m considerations, the rc time constant of the a-side bus must be considered. it is recommended that the rc time constant be chosen so that it is greater than 60 ns in order to control the size of the bounce that results when a driver on the a side turns off that was driving a <0.1v cc(a) level and before the offset output driver in the pca9509p can turn on and hold the voltage to ~0.2v cc(a) . the maximum rc time constant is limited by the i 2 c-bus family specification for maximum rise time between 0.3v cc(a) and 0.7v cc(a) (400 ns for fast mode and 1000 ns for standard mode operation). although the maxi mum current and maximum rise time limits predict an allowable capacitance well above the 400 pf i 2 c-bus family specification, this is not likely to be possible in a typical i 2 c-bus system since there is so little voltage margin for the v il of the pca9509p ground offset is more likely to limit the effective capacitance than current drive capability because high-cap acitance buses tend to be physically large and large size tends to result in larger ground offset voltages, which must be severely limited to be successful at a bus voltage of 1 v and below.
pca9509p all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 1 ? 14 august 2012 8 of 23 nxp semiconductors pca9509p low power level translating i 2 c-bus/smbus repeater 7. application design-in information a typical application is shown in figure 4 . in this example, the cpu is running on a 0.9 v i 2 c-bus while the slave is connected to a 3.3 v bus. both buses run at 400 khz. master devices can be placed on either bus. when port b of the pca9509p is pulled low by a driver on the i 2 c-bus, a cmos hysteresis input detects the fallin g edge when it goes below 0.3v cc(b) and causes the internal driver on port a to turn on, causing port a to pull down to about 0.2v cc(a) . when port a of the pca9509p falls, a comparator detects the fallin g edge when it falls below 0.15v cc(a) and causes the internal driver on port b to turn on and pull the port b pin down to ground. in order to illustrate what would be seen in a typical application, refer to figure 5 and figure 6 . if the bus master in figure 4 were to write to the slave through the pca9509p, waveforms shown in figure 5 would be observed on the b bus. this looks like a normal i 2 c-bus transmission. on the a bus side of the pca9509p, the clock and data lines would have a positive offset from ground equal to the v ol of the pca9509p. after the 8 th clock pulse, the data line will be pulled to the v ol of the master device, which is very close to ground in this example. at the end of the acknowledge, the level rises only to the low level set by the driver in the pca9509p for a short delay while the b bus side rises above 0.5v cc(b) , then it continues high. it is important to note that any arbitrat ion or clock stretching events require that the low level on the a bus side at the input of the pca9509p (v il ) is below 0.1v cc(a) to be recognized by the pca9509p and th en transmitted to the b bus side. fig 4. typical application fig 5. bus b smbus/i 2 c-bus waveform 002aag176 v cc(b) v cc(a) pca9509p a1 b1 a2 b2 en 10 k 10 k sda scl master cpu slave 400 khz sda scl bus a bus b 3.3 v 0.9 v 10 k 0.9 v 002aab644 9th clock pulse acknowledge scl sda
pca9509p all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 1 ? 14 august 2012 9 of 23 nxp semiconductors pca9509p low power level translating i 2 c-bus/smbus repeater 8. limiting values [1] with i/o pins off. if active, see i ol . fig 6. bus a lower voltage waveform 002aag177 9th clock pulse acknowledge scl sda v ol of master v ol of pca9509p table 4. limiting values in accordance with the absolute maximum rating system (iec 60134). symbol parameter conditions min max unit v cc(b) supply voltage port b ? 0.5 +6.0 v v cc(a) supply voltage port a ? 0.5 +6.0 v v i/o voltage on an input/output pin port a [1] ? 0.5 +6.0 v port b; enable pin (en) [1] ? 0.5 +6.0 v i i/o input/output current - ? 20 ma i ol low-level output current a-side i/o active low - 20 ma b-side i/o active low - 40 ma i i input current - ? 20 ma p tot total power dissipation - 100 mw t stg storage temperature ? 65 +150 ?c t amb ambient temperature operating in free air ? 40 +85 ?c t j junction temperature - +125 ?c t sp solder point temperature 10 s max. - 300 ?c
pca9509p all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 1 ? 14 august 2012 10 of 23 nxp semiconductors pca9509p low power level translating i 2 c-bus/smbus repeater 9. static characteristics [1] typical values with v cc(a) = 1.1 v, v cc(b) =3.3v. table 5. static characteristics gnd = 0 v; t amb = ? 40 ? cto+85 ? c; unless otherwise specified. symbol parameter conditions min typ [1] max unit supplies v cc(b) supply voltage port b 2.3 - 5.5 v v cc(a) supply voltage port a 0.8 [2] -1 . 5v i cc(a) supply current port a all port a static high or low 2 5 12 ? a i cc(b) supply current port b all port b static high 200 500 850 ? a all port b static low 200 510 950 ? a i cc(b)stb standby port b supply current en = low 0.5 1.5 10 ? a input and output of port a (a1 to a2) v ih high-level input voltage port a 0.2v cc(a) -v cc(a) v v il low-level input voltage ? 0.5 - +0.1v cc(a) v v ik input clamping voltage i l = ? 18 ma ? 1.5 - ? 0.5 v i li input leakage current v i =v cc(a) ; en = high; b1 = high ? 10 - +10 ? a en = gnd ? 1- +1 ? a v ol low-level output voltage v cc(a) = 0.8 v to 1.5 v; i load =100 ? a [3] -0.2v cc(a) 0.25v cc(a) v v ol ? v il difference between low-level output and low-level input voltage [4] -0.05v cc(a) -m v c io input/output capacitance disabled - 7 10 pf input and output of port b (b1 to b2) v ih high-level input voltage port b 0.7v cc(b) -v cc(b) v v il low-level input voltage port b ? 0.5 - +0.3v cc(b) v v ik input clamping voltage i l = ? 18 ma ? 1.5 - ? 0.5 v i li input leakage current v i = 3.6 v with an input high ? 1.0 - +1.0 ? a i il low-level input current v i =200mv; v cc(b) =5.5v; v cc(a) = 1.5 v; port a = 1.35 k ? pull-up to v cc(a) ? 10 - +10 ? a v ol low-level output voltage i ol =6ma - 0.1 0.2 v i ol =30ma at v cc(b) = 3.0 v - 0.2 0.5 v c io input/output capacitance disabled - 3 5 pf enable v il low-level input voltage ? 0.5 - +0.2v cc(a) v v ih high-level input voltage 0.8v cc(a) -v cc(b) v i il(en) low-level input current on pin en v i = 0.2 v; v cc(b) =3.6v; v cc(a) =1.1v ? 10 - +1 ? a i li input leakage current v i =v cc(a) ? 1- +1 ? a c i input capacitance v i =3.0v - 2 3 pf
pca9509p all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 1 ? 14 august 2012 11 of 23 nxp semiconductors pca9509p low power level translating i 2 c-bus/smbus repeater [2] care must be taken to minimize the resistance in series with the ground pin of the pca9509p to the ground reference point of the v cc(a) supply because there is only 80 mv margin between the power good threshold and the 0.8 v minimum supply voltage at cold temperature ( ?40 ? c). because the b-side i ol of up to 30 ma flows through the resistance causing a voltage drop that effectively reduces the v cc(a) to chip ground voltage and when v cc(a) is less than the power good voltage ~0.72 v, the pca9509p is disabled. for example, if the resistance is 1.4 ? , then 1.4 ?? 60 ma = 84 mv and 0.8 v ? 0.084 v = 0.716 v, which is less than the power good threshold, so the pca9509p will disable when both outputs drive low. [3] as long as the chip ground is common with the input gr ound reference the driver resistance may be as large as 120 ? . however, ground offset will rapidly dec rease the maximum allowed driver resistance. [4] guaranteed by design. 10. dynamic characteristics [1] load capacitance = 50 pf; load resistance on port b = 1.35 k ? . port a = 1.35 k ? , and an input falling slew rate of 0.05 v/ns. [2] typical values were measured with v cc(a) = 1.1 v, v cc(b) = 3.3 v at t amb =25 ? c. [3] enable pin (en) should only change state when the bus and the repeater port are in an idle state. that is, the t en should be considered the set-up time before start and t dis should be considered the hold time after stop. table 6. dynamic characteristics v cc(a) = 0.8 v to 1.5 v; v cc(b) = 2.3 v to 5.5 v; gnd = 0 v; t amb = ? 40 ? c to +85 ? c; unless otherwise specified. [1] symbol parameter conditions min typ [2] max unit t plh low to high propagation delay port b to port a [1] 70 110 180 ns t phl high to low propagation delay port b to port a [1] 104 156 270 ns sr f falling slew rate port a; 0.7v cc(a) to 0.3v cc(a) [1] 0.007 0.015 0.036 v/ns t plh low to high propagation delay port a to port b [1] ? 72 ? 110 ? 175 ns t plh2 low to high propagation delay 2 port a to port b; measured from 0.15v cc(a) on port a to 0.5v cc(b) on port b [1] 61 98 266 ns t phl high to low propagation delay port a to port b [1] 52 89 226 ns sr f falling slew rate port b; 0.7v cc(b) to 0.3v cc(b) [1] 0.02 0.05 0.1 v/ns t en enable time en high to enabled [3] 10 - - ? s t dis disable time en low to disabled [3] 300 - - ns
pca9509p all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 1 ? 14 august 2012 12 of 23 nxp semiconductors pca9509p low power level translating i 2 c-bus/smbus repeater 10.1 ac waveforms 10.2 performance curves fig 7. propagation delay times and slew rate; port b to port a fig 8. propagation delay times and slew rate; port a to port b fig 9. propagation delay from the port a?s external driver switching off to port b low-to-high transition; port a to port b 002aag139 v cc(b) v cc(a) t plh sr f 0.5v cc(b) 0.5v cc(b) input output 30 % 0.5v cc(a) 0.5v cc(a) 70 % 30 % 70 % t phl sr r v ol 0.1 v 002aag140 v cc(a) v cc(b) t plh sr f 0.5v cc(a) 0.5v cc(a) input output 0.5v cc(b) 0.5v cc(b) 30 % 70 % t phl t plh2 input port a output port b 002aaf976 0.15v cc(a) 0.5v cc(b) 0.5v cc(a) t plh v cc(a) = 1.1 v; v cc(b) =3.3v (1) port a t phl (2) port a t plh (3) port b t plh2 (4) port b t phl v cc(a) = 1.1 v; v cc(b) =3.3v fig 10. typical propagation delay versus ambient temperature fig 11. typical port b low to high propagation delay versus ambient temperature 180 time (ns) 80 t amb (c) ?50 125 002aag178 100 755025 0?25 100 120 140 160 (1) (2) (4) (3) ?102 t plh (ns) ?118 t amb (c) ?50 125 002aag179 100 7550 25 0?25 ?114 ?110 ?106
pca9509p all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 1 ? 14 august 2012 13 of 23 nxp semiconductors pca9509p low power level translating i 2 c-bus/smbus repeater v cc(a) = 1.1 v; v cc(b) =3.3v (1) slew rate of falling signal, port b (2) slew rate of rising signal, port b (3) slew rate of falling signal, port a (4) slew rate of rising signal, port a t amb =27 ? c; v cc(b) =3.3v (1) port a t phl (2) port a t plh (3) port b t plh2 (4) port b t phl fig 12. typical slew rate versus ambient temperat ure fig 13. typical propagation delay versus port a supply voltage t amb =27 ? c; v cc(b) =3.3v t amb =27 ? c; v cc(b) =3.3v (1) slew rate of falling signal, port b (2) slew rate of rising signal, port b (3) slew rate of falling signal, port a (4) slew rate of rising signal, port a fig 14. typical port b low to high propagation delay versus port a supply voltage fig 15. typical slew rate versus port a supply voltage 0.02 0.04 0.06 sr (v/ns) 0 t amb (c) ?50 125 002aag183 100 755025 0?25 (1) (2) (3) (4) 70 150 190 time (ns) v cc(a) (v) 0.8 1.5 0.9 002aag184 1.0 1.2 1.3 1.4 1.1 110 (1) (2) (3) (4) ?112 ?108 t plh (ns) v cc(a) (v) 0.8 1.5 0.9 002aag191 1.0 1.2 1.3 1.4 1.1 ?111 ?110 ?109 0 0.04 0.06 sr (v/ns) v cc(a) (v) 0.8 1.5 0.9 002aag192 1.0 1.2 1.3 1.4 1.1 0.02 (1) (2) (3) (4)
pca9509p all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 1 ? 14 august 2012 14 of 23 nxp semiconductors pca9509p low power level translating i 2 c-bus/smbus repeater t amb =27 ? c; v cc(a) =1.1v (1) port a t phl (2) port a t plh (3) port b t plh2 (4) port b t phl t amb =27 ? c; v cc(a) =1.1v fig 16. typical propagation delay versus port b supply voltage fig 17. typical port b low to high propagation delay versus port b supply voltage t amb =27 ? c; v cc(a) =1.1v (1) slew rate of falling signal, port b (2) slew rate of rising signal, port b (3) slew rate of falling signal, port a (4) slew rate of rising signal, port a fig 18. typical slew rate versus port b supply voltage 110 130 90 150 170 time (ns) 70 002aag193 v cc(b) (v) 2.0 5.5 2.5 3.0 4.0 4.5 5.0 3.5 (2) (4) (1) (3) ?120 ?110 ?130 ?100 ?90 t plh (ns) ?140 002aag194 v cc(b) (v) 2.0 5.5 2.5 3.0 4.0 4.5 5.0 3.5 0.04 0.06 0.02 0.08 sr (v/ns) 0 002aag195 v cc(b) (v) 2.0 5.5 2.5 3.0 4.0 4.5 5.0 3.5 (2) (1) (3) (4)
pca9509p all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 1 ? 14 august 2012 15 of 23 nxp semiconductors pca9509p low power level translating i 2 c-bus/smbus repeater 11. test information r l = load resistor; 1.35 k ? c l = load capacitance includes ji g and probe capacitance; 50 pf r t = termination resistance should be equal to z o of pulse generators fig 19. test circuit for op en-drain outputs a to b r l = load resistor; 1.35 k ? c l = load capacitance includes ji g and probe capacitance; 50 pf r t = termination resistance should be equal to z o of pulse generators fig 20. test circuit for op en-drain outputs b to a open-drain buffer v o c l r l 002aag196 r t v i v cc(b) v cc(a) dut v cc(a) b a pulse generator v cc(b) open-drain buffer v o c l r l 002aag197 r t v i v cc(a) v cc(b) dut v cc(b) a b pulse generator r l v cc(b)
pca9509p all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 1 ? 14 august 2012 16 of 23 nxp semiconductors pca9509p low power level translating i 2 c-bus/smbus repeater 12. package outline fig 21. package outline sot505-1 (tssop8) unit a 1 a max. a 2 a 3 b p lh e l p wy v ce d (1) e (2) z (1) references outline version european projection issue date iec jedec jeita mm 0.15 0.05 0.95 0.80 0.45 0.25 0.28 0.15 3.1 2.9 3.1 2.9 0.65 5.1 4.7 0.70 0.35 6 0 0.1 0.1 0.1 0.94 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic or metal protrusions of 0.25 mm maximum per side are not included. 0.7 0.4 sot505-1 99-04-09 03-02-18 w m b p d z e 0.25 14 8 5 a a 2 a 1 l p (a 3 ) detail x l h e e c v m a x a y 2.5 5 mm 0 scale tssop8: plastic thin shrink small outline package; 8 leads; body width 3 mm sot505-1 1.1 pin 1 index
pca9509p all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 1 ? 14 august 2012 17 of 23 nxp semiconductors pca9509p low power level translating i 2 c-bus/smbus repeater fig 22. package outline sot902-2 (xqfn8) references outline version european projection issue date iec jedec jeita sot902-2 - - - mo-255 - - - sot902-2_po 10-11-02 11-03-31 unit (1) mm max nom min 0.5 0.05 0.00 1.65 1.60 1.55 1.65 1.60 1.55 0.55 0.5 0.15 0.10 0.05 0.1 0.05 a dimensions note 1. plastic or metal protrusions of 0.075 mm maximum per side are not included. xqfn8: plastic, extremely thin quad flat package; no leads; 8 terminals; body 1.6 x 1.6 x 0.5 mm sot902-2 a 1 b 0.25 0.20 0.15 deee 1 l 0.35 0.30 0.25 l 1 vw 0.05 yy 1 0.05 0 1 2 mm scale terminal 1 index area b a d e x c y c y 1 terminal 1 index area 3 l l 1 b e 1 e ac b v c w 2 1 5 6 7 metal area not for soldering 8 4 a 1 a detail x
pca9509p all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 1 ? 14 august 2012 18 of 23 nxp semiconductors pca9509p low power level translating i 2 c-bus/smbus repeater 13. soldering of smd packages this text provides a very brief insight into a complex technology. a more in-depth account of soldering ics can be found in application note an10365 ?surface mount reflow soldering description? . 13.1 introduction to soldering soldering is one of the most common methods through which packages are attached to printed circuit boards (pcbs), to form electr ical circuits. the soldered joint provides both the mechanical and the electrical connection. th ere is no single sold ering method that is ideal for all ic packages. wave soldering is often preferred when through-hole and surface mount devices (smds) are mixed on one printed wiring board; however, it is not suitable for fine pitch smds. reflow soldering is ideal for the small pitches and high densities that come with increased miniaturization. 13.2 wave and reflow soldering wave soldering is a joining technology in which the joints are made by solder coming from a standing wave of liquid solder. the wave soldering process is suitable for the following: ? through-hole components ? leaded or leadless smds, which are glued to the surface of the printed circuit board not all smds can be wave soldered. packages with solder balls, and some leadless packages which have solder lands underneath the body, cannot be wave soldered. also, leaded smds with leads having a pitch smaller than ~0.6 mm cannot be wave soldered, due to an increased pr obability of bridging. the reflow soldering process involves applying solder paste to a board, followed by component placement and exposure to a temperature profile. leaded packages, packages with solder balls, and leadless packages are all reflow solderable. key characteristics in both wave and reflow soldering are: ? board specifications, in cluding the board finish , solder masks and vias ? package footprints, including solder thieves and orientation ? the moisture sensitivit y level of the packages ? package placement ? inspection and repair ? lead-free soldering versus snpb soldering 13.3 wave soldering key characteristics in wave soldering are: ? process issues, such as application of adhe sive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave ? solder bath specifications, including temperature and impurities
pca9509p all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 1 ? 14 august 2012 19 of 23 nxp semiconductors pca9509p low power level translating i 2 c-bus/smbus repeater 13.4 reflow soldering key characteristics in reflow soldering are: ? lead-free versus snpb solderi ng; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see figure 23 ) than a snpb process, thus reducing the process window ? solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board ? reflow temperature profile; this profile includ es preheat, reflow (in which the board is heated to the peak temperature) and cooling down. it is imperative that the peak temperature is high enough for the solder to make reliable solder joints (a solder paste characteristic). in addition, the peak temperature must be low enough that the packages and/or boards are not damaged. the peak temperature of the package depends on package thickness and volume and is classified in accordance with ta b l e 7 and 8 moisture sensitivity precautions, as indicat ed on the packing, must be respected at all times. studies have shown that small packages reach higher temperatures during reflow soldering, see figure 23 . table 7. snpb eutectic process (from j-std-020c) package thickness (mm) package reflow temperature ( ?c) volume (mm 3 ) < 350 ? 350 < 2.5 235 220 ? 2.5 220 220 table 8. lead-free process (from j-std-020c) package thickness (mm) package reflow temperature ( ?c) volume (mm 3 ) < 350 350 to 2000 > 2000 < 1.6 260 260 260 1.6 to 2.5 260 250 245 > 2.5 250 245 245
pca9509p all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 1 ? 14 august 2012 20 of 23 nxp semiconductors pca9509p low power level translating i 2 c-bus/smbus repeater for further information on temperature profiles, refer to application note an10365 ?surface mount reflow soldering description? . 14. abbreviations 15. revision history msl: moisture sensitivity level fig 23. temperature profiles for large and small components 001aac844 temperature time minimum peak temperature = minimum soldering temperature maximum peak temperature = msl limit, damage level peak temperature table 9. abbreviations acronym description cdm charged-device model cmos complementary metal-oxide semiconductor cpu central processing unit esd electrostatic discharge hbm human body model i/o input/output i 2 c-bus inter-integrated circuit bus nmos negative-channel metal-oxide semiconductor rc resistor-capacitor network smbus system management bus table 10. revision history document id release date data sheet status change notice supersedes pca9509p v.1 20120814 product data sheet - -
pca9509p all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 1 ? 14 august 2012 21 of 23 nxp semiconductors pca9509p low power level translating i 2 c-bus/smbus repeater 16. legal information 17. data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term ?short data sheet? is explained in section ?definitions?. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple device s. the latest product status information is available on the internet at url http://www.nxp.com . 17.1 definitions draft ? the document is a draft versi on only. the content is still under internal review and subject to formal approval, which may result in modifications or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall hav e no liability for the consequences of use of such information. short data sheet ? a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request vi a the local nxp semiconductors sales office. in case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. product specification ? the information and data provided in a product data sheet shall define the specification of the product as agreed between nxp semiconductors and its customer , unless nxp semiconductors and customer have explicitly agreed otherwis e in writing. in no event however, shall an agreement be valid in which the nxp semiconductors product is deemed to offer functions and qualities beyond those described in the product data sheet. 17.2 disclaimers limited warranty and liability ? information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such info rmation. nxp semiconductors takes no responsibility for the content in this document if provided by an information source outside of nxp semiconductors. in no event shall nxp semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. notwithstanding any damages that customer might incur for any reason whatsoever, nxp semiconductors? aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the terms and conditions of commercial sale of nxp semiconductors. right to make changes ? nxp semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use ? nxp semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors and its suppliers accept no liability for inclusion and/or use of nxp semiconducto rs products in such equipment or applications and therefore such inclusion and/or use is at the customer?s own risk. applications ? applications that are described herein for any of these products are for illustrative purpos es only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. customers are responsible for the design and operation of their applications and products using nxp semiconductors products, and nxp semiconductors accepts no liability for any assistance with applications or customer product design. it is customer?s sole responsibility to determine whether the nxp semiconductors product is suitable and fit for the customer?s applications and products planned, as well as fo r the planned application and use of customer?s third party customer(s). customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. nxp semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer?s applications or products, or the application or use by customer?s third party customer(s). customer is responsible for doing all necessary testing for the customer?s applic ations and products using nxp semiconductors products in order to av oid a default of the applications and the products or of the application or use by customer?s third party customer(s). nxp does not accept any liability in this respect. limiting values ? stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) will cause permanent damage to the device. limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the recommended operating conditions section (if present) or the characteristics sections of this document is not warranted. constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. terms and conditions of commercial sale ? nxp semiconductors products are sold subject to the gener al terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. in case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. nxp semiconductors hereby expressly objects to applying the customer?s general terms and conditions with regard to the purchase of nxp semiconducto rs products by customer. document status [1] [2] product status [3] definition objective [short] data sheet development this document contains data from the objecti ve specification for product development. preliminary [short] data sheet qualification this document contains data from the preliminary specification. product [short] data sheet production this document contains the product specification.
pca9509p all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 1 ? 14 august 2012 22 of 23 nxp semiconductors pca9509p low power level translating i 2 c-bus/smbus repeater no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products t hat is open for acceptance or the grant, conveyance or implication of any licens e under any copyrights, patents or other industrial or intellectual property rights. export control ? this document as well as the item(s) described herein may be subject to export control regu lations. export might require a prior authorization from competent authorities. non-automotive qualified products ? unless this data sheet expressly states that this specific nxp semicon ductors product is automotive qualified, the product is not suitable for automotive use. it is neither qualified nor tested in accordance with automotive testing or application requirements. nxp semiconductors accepts no liabili ty for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. in the event that customer uses t he product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without nxp semiconductors? warranty of the product for such automotive applicat ions, use and specifications, and (b) whenever customer uses the product for automotive applications beyond nxp semiconductors? specifications such use shall be solely at customer?s own risk, and (c) customer fully indemnifies nxp semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive app lications beyond nxp semiconductors? standard warranty and nxp semiconduct ors? product specifications. translations ? a non-english (translated) version of a document is for reference only. the english version shall prevail in case of any discrepancy between the translated and english versions. 17.3 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners. i 2 c-bus ? logo is a trademark of nxp b.v. 18. contact information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com
nxp semiconductors pca9509p low power level translating i 2 c-bus/smbus repeater ? nxp b.v. 2012. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 14 august 2012 document identifier: pca9509p please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 19. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 1.1 selection recommendations . . . . . . . . . . . . . . . 2 2 features and benefits . . . . . . . . . . . . . . . . . . . . 2 3 ordering information . . . . . . . . . . . . . . . . . . . . . 3 4 functional diagram . . . . . . . . . . . . . . . . . . . . . . 3 5 pinning information . . . . . . . . . . . . . . . . . . . . . . 4 5.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 functional description . . . . . . . . . . . . . . . . . . . 5 6.1 enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 6.2 i 2 c-bus systems . . . . . . . . . . . . . . . . . . . . . . . . 6 6.3 edge rate control . . . . . . . . . . . . . . . . . . . . . . . 6 6.4 bus pull-up resistor selection . . . . . . . . . . . . . . 6 6.4.1 port a pull-up resistor sizing . . . . . . . . . . . . . . . 7 6.4.1.1 minimum resistor size . . . . . . . . . . . . . . . . . . . . 7 6.4.1.2 maximum resistance sizing. . . . . . . . . . . . . . . . 7 6.4.1.3 rise time constraints . . . . . . . . . . . . . . . . . . . . 7 7 application design-in information . . . . . . . . . . 8 8 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 9 9 static characteristics. . . . . . . . . . . . . . . . . . . . 10 10 dynamic characteristics . . . . . . . . . . . . . . . . . 11 10.1 ac waveforms . . . . . . . . . . . . . . . . . . . . . . . . 12 10.2 performance curves . . . . . . . . . . . . . . . . . . . . 12 11 test information . . . . . . . . . . . . . . . . . . . . . . . . 15 12 package outline . . . . . . . . . . . . . . . . . . . . . . . . 16 13 soldering of smd packages . . . . . . . . . . . . . . 18 13.1 introduction to soldering . . . . . . . . . . . . . . . . . 18 13.2 wave and reflow soldering . . . . . . . . . . . . . . . 18 13.3 wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 18 13.4 reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 19 14 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 20 15 revision history . . . . . . . . . . . . . . . . . . . . . . . . 20 16 legal information. . . . . . . . . . . . . . . . . . . . . . . 21 17 data sheet status . . . . . . . . . . . . . . . . . . . . . . 21 17.1 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 17.2 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 17.3 trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 22 18 contact information. . . . . . . . . . . . . . . . . . . . . 22 19 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

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